Our Research
Large-area stitched sensor: the future of Monolithic Active Pixel Sensors (MAPS) sensors
MOSAIX is a full-scale, full-size monolithic CMOS pixel sensor prototype developed for the ALICE Inner Tracking System 3 (ITS3), which will replace the three innermost layers of the ALICE tracker during the LHC Long Shutdown 3 (LS3). MOSAIX building blocks stitched together form an independent, fully functional sensor referred to as a segment
With over 26 cm in length and 2 cm in width, MOSAIX contains 12 Repeated Sensor Units (RSUs). A single RSU has 12 pixel matrix tiles, each with 444 × 156 pixels and a pixel dimension of 22.8 × 20.8 μm². Power supply and data lines of each RSU are connected by stitching to the power pads on the Left and Right Endcaps and to the readout processing block in the Left Endcap, respectively. MOSAIX is designed to operate with air cooling only and redefines the limits of monolithic CMOS pixel detectors, spanning an entire wafer while pixels maintain over 99% detection efficiency and a fake hit rate below 0.1 pixel⁻¹ s⁻¹. By thinning MOSAIX to 50 μm and supporting it only with ultra-light carbon-foam structures, the ITS3 achieves an average material budget of 0.09% X₀ per layer.
On-wafer high-speed characterization of wafer-scale pixel sensors
In collaboration with industry partners, the development of a custom wafer probe card allows the characterisation of high-speed signals up to 10.24 Gbps – a first in the field for fully integrated wafer-scale sensors. This crucial advancement in technology allows to exercise the entire sensor functionality needed for selection of the final sensors to be installed in the detector.
The probe card is also unique in its kind as it is fully modular allowing the extension from single-die to multi-die testing by combining individual probe card modules. The lateral probe card module arrangement can be adapted to match various wafer floor plans. This project is a dedicated R&D effort between the PixelPhi Lab and our industry partner MPI.
Wafer-scale MAPS are novel devices in the field, allowing to instrument an unprecedented detector volume with high-resolution tracking sensors. The SVT detector will rely on 8 m2 of pixel sensors which need to be characterized and selected before integration. We are pioneering a fully automated wafer probing system required for the large volume of devices to be tested. Apart from high-speed data readout, multi-chip contacting and calibration and irradiation measurements with laser, X-Ray, and irradiation sources are explored.
Silicon Vertex Tracker for ePIC
The ePIC (Electron-Proton/Ion Collider) collaboration is developing the first experiment for the upcoming EIC (Electron-Ion Collider) at Brookhaven National Lab, planned to start in the early 2030’s. The Silicon Vertex Tracker (SVT) will utilize MAPS for precision tracking of charged particles. Our team is developing both software and hardware for the SVT.
Initial testing is partially automated and performed with a wafer probe device. We are building this test system including probe cards, adapter cards and software that will automate pixel matrix scans. This system will be able to accommodate high bandwidth signals from the detector, up to 10 Gbps. In addition, we are developing fully automated routines to configure the detector, verify the yield of noisy and dead pixels, and perform threshold scans to identify sensor noise levels. Once sensors are finalized and wire-bonded to readout cards, our team will build the readout software.
The SVT will have an incredible pixel density and high statistics requirements, necessitating extreme efficiency from cutting edge technology.
MVTX for the sPHENIX experiment
sPHENIX is a radical makeover of the PHENIX experiment, one of the original detectors designed to collect data at Brookhaven National Lab’s RHIC (Relativistic Heavy Ion Collider). It includes many new components that significantly enhance scientists’ ability to learn about quark-gluon plasma (QGP), an exotic form of nuclear matter created in RHIC’s energetic particle smashups.
The innermost layer of sPHENIX is the MVTX (MAPS-based VerTeX) detector which measures the position of charged particles emerging from RHIC’s collisions and is a critical component for measuring charged particle momentum. MAPS represent a new development in pixel technologies in which pixels are embedded directly into the readout chips, instead of bump-bonding silicon wafers to ASICs. This allows for a lower material budget, smaller pixel size, and reduced noise, providing a significant improvement to the hit, momentum and vertex resolutions.
MIT is a major proponent of the MVTX project. We have made contributions in all aspects of the detector: the design of the support mechanism, the carbon fibre structure, the detector cooling system, readout firmware, and control software. We also participated in the construction and installation of the final detector. The MVTX is currently installed in sPHENIX at Brookhaven National Laboratory, where it has been collecting data since Spring 2023.
Artificial intelligence for FPGAs
Modern high-energy physics experiments generate so much data that it impossible to record everything. An initial selection of interesting events is required to reduce the data rate to a manageable level. Our team is using the sPHENIX experiment to demonstrate a “smart trigger” which will be deployed at the future EIC (Electron-Ion Collider).
Collision event data are continuously streamed from the inner silicon detectors to the smart trigger. The trigger performs fast event reconstruction and utilizes machine learning algorithms employed directly on an FPGA to decide whether or not an event should be recorded, all within 5 μs!
In sPHENIX, the inner silicon sensors are a MAPS-based vertex detector—the MVTX—and a strip-based timing detector—the INTT—which make fast decisions on a FELIX FPGA board to trigger the remaining two tracking detectors: a GEM detector and a Micromega detector.
MIT personnel are key developers of the hls4ml software used to convert machine learning algorithms to firmware blocks. Our team designed the initial simulations used to develop the tracking and trigger algorithms, and is behind the construction of the firmware-based clustering for the MVTX detector. In addition, we built and maintain a server housing FELIX cards for the development and testing of global firmware.